SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME

PROBLEM TO BE SOLVED: To provide an MISFET having a constant channel length in a vertical direction.SOLUTION: An MISFET comprises: a pair of SiGe layers 2 (first semiconductor layers) provided on an Si substrate 1; a pair of SiGe layers 6 (second semiconductor layers) provided between the SiGe layers 2 with respective one lateral faces being brought into contact with the SiGe layers 2; a strained Si layer 7 (third semiconductor layer) interposed between the SiGe layers 6 with lateral faces being brought into contact with the SiGe layers 6; a gate electrode 14 of a peaked structure extending on side walls 12 provided on the SiGe layers 6, which is provided on the strained Si layer 7 via a gate insulation film 13; an embedded Ge layer 5 provided in the Si substrate 1 just below the SiGe layers 6 and the strained Si layer 7; ntype source/drain regions (8, 11) with ends having flat surfaces perpendicular to a principal surface of the Si substrate 1, which are provided in the SiGe layers 2, respectively; n type source/drain regions (9, 10)with ends having flat surfaces perpendicular to the principal surface of the Si substrate 1, which are provided in the SiGe layers 6, respectively; and channel regions which are provided in the strained Si layer 7 in a vertical direction and have constant (equal) channel lengths.SELECTED DRAWING: Figure 1 【課題】垂直方向に一定なチャネル長を有するＭＩＳＦＥＴの提供【解決手段】Ｓｉ基板１上に一対のＳｉＧｅ層２（第１の半導体層）を設け、ＳｉＧｅ層２間に１側面をそれぞれ接して一対のＳｉＧｅ層６（第２の半導体層）を設け、ＳｉＧｅ層６間に対向する側面をそれぞれ接して歪みＳｉ層７（第３の半導体層）を挟んで設け、歪みＳｉ層７上にゲート絶縁膜１３を介して、ＳｉＧｅ層６上に設けたサイドウォール１２上に延在した庇構造のゲート電極１４を設け、ＳｉＧｅ層６及び歪みＳｉ層７直下のＳｉ基板１に埋め込みＧｅ層５を設け、端部がＳｉ基板１の主面に対し、垂直な平面を有する、ｎ＋型ソースドレイン領域（８、１１）をＳｉＧｅ層２に、ｎ型ソースドレイン領域（９、１０）をＳｉＧｅ層６に、それぞれ設け、歪みＳｉ層７に垂直方向にチャネル長が一定の（等しい）チャネル領域を設けたＭＩＳＦＥＴ。【選択図】図１