SEMICONDUCTOR DEVICE MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method which can minimize parasitic capacitance of an element arranged between an input/output terminal and a ground for inhibiting decrease in a transmission rate of a signal.SOLUTION: A semiconductor device manufacturing method...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: MOURAGUCHI AKIO, HIRANO DAISUKE, KUBOTA HARUKA
Format: Patent
Sprache:eng ; jpn
Schlagworte:
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