VARIABLE CAPACITANCE CAPACITOR AND ELECTRONIC SYSTEM

PROBLEM TO BE SOLVED: To increase a speed of a response to a variable voltage and suppress characteristic deterioration.SOLUTION: A variable capacitance capacitor comprises: a plurality of capacitors C1 to C4 that is serially connected between first and second signal terminals Ts1 and Ts2 to which a...

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Bibliographische Detailangaben
Hauptverfasser: IKENAGA MICHIKAZU, NATSUME SHINJI
Format: Patent
Sprache:eng ; jpn
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Zusammenfassung:PROBLEM TO BE SOLVED: To increase a speed of a response to a variable voltage and suppress characteristic deterioration.SOLUTION: A variable capacitance capacitor comprises: a plurality of capacitors C1 to C4 that is serially connected between first and second signal terminals Ts1 and Ts2 to which an AC signal is inputted and outputted, and in which a capacitance value is changed by a variable voltage applied to a variable terminal Tp; first resistances R2 and R4 which are connected between nodes N2 and N4 of the adjacent capacitors and the variable terminal; a second resistance R3 that is connected between a second node N3 between the adjacent capacitors and a fixing terminal Tg to which a fixing voltage is applied; and third resistances R1 and R5 that are connected between third nodes N1 and N5 between first and second signal terminal side capacitors C1 and C3 of the plurality of capacitors and the second signal terminal and the fixing terminal. All resistance values of the second reference is a value less than 1 and is equal to 1/2 or more as a reference of the resistance value of the third resistance. All of resistance values of the second resistance is not equal to at least one resistance of the plurality of first resistances.SELECTED DRAWING: Figure 1 【課題】可変電圧に対する応答を早くしかつ特性劣化を抑制する。【解決手段】交流信号が入出力する第1および第2信号端子Ts1、Ts2の間に直列に接続され、可変端子Tpに印加される可変電圧により容量値が変化する複数のキャパシタC1−C4と、隣接するキャパシタ間のノードN2、N4と前記可変端子との間にそれぞれ接続された第1抵抗R2、R4と、隣接するキャパシタの間の第2ノードN3と固定電圧が印加される固定端子Tgとの間に接続された第2抵抗R3と、複数のキャパシタのうち最も第1および第2信号端子側のキャパシタC1、C3と第1および第2信号端子との間の第3ノードN1、N5と固定端子との間に接続された第3抵抗R1、R5と、を具備し、第3抵抗の抵抗値を基準として第2抵抗の全ての抵抗値は1未満かつ1/2以上であり、第2抵抗の全ての抵抗値は複数の第1抵抗の少なくとも1つの抵抗値と等しくない可変容量コンデンサ。【選択図】図1