SEMICONDUCTOR PACKAGE, SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE

PROBLEM TO BE SOLVED: To provide a semiconductor package for improving resistance to breakage of solder by thermal stress and a manufacturing method of the same.SOLUTION: The semiconductor package includes: a chip on which an integrated circuit is arranged on a first surface; an electrode pad electr...

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Bibliographische Detailangaben
Hauptverfasser: TAKAKU SATORU, ARAI TOSHIMITSU
Format: Patent
Sprache:eng ; jpn
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a semiconductor package for improving resistance to breakage of solder by thermal stress and a manufacturing method of the same.SOLUTION: The semiconductor package includes: a chip on which an integrated circuit is arranged on a first surface; an electrode pad electrically connected to a chip on a second surface different from the first surface; a substrate; a solder installed on the electrode pad; and an insulating material disposed on the second surface of the substrate such that a portion of the solder is exposed.SELECTED DRAWING: Figure 1 【課題】熱応力による、はんだの破断耐性の向上を図る半導体パッケージ及びその製造方法を提供する。【解決手段】本発明の実施形態に係る半導体パッケージは、第1の面に集積回路が配置されているチップを備え、前記第1の面とは異なる第2の面に前記チップと電気的に接続されている電極パッドを備える、基板と、前記電極パッド上に設置される、はんだと、前記基板の前記第2の面に、前記はんだの一部が露出するように設置される、絶縁材料と、を備える。【選択図】図1