FAN-OUT SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

PROBLEM TO BE SOLVED: To provide a fan-out semiconductor package and a manufacturing method thereof.SOLUTION: The present invention relates to a fan-out semiconductor package and a manufacturing method thereof. The fan-out semiconductor package includes: a first connection member having a through ho...

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Hauptverfasser: LEE DOO HWAN, KIM HYOUNG JOON, KIM JONG RIP, OH KYUNG SEOB
Format: Patent
Sprache:eng ; jpn
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a fan-out semiconductor package and a manufacturing method thereof.SOLUTION: The present invention relates to a fan-out semiconductor package and a manufacturing method thereof. The fan-out semiconductor package includes: a first connection member having a through hole; a semiconductor chip disposed in the through hole of the first connection member and having an active surface on which a connection pad is disposed and a non-active surface disposed on an opposing side of the active surface; an encapsulant at least partially encapsulating the first connection member and the non-active surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pad, The first connection member includes a first insulating layer, a first redistribution layer is embedded in the first insulating layer while contacting the second connection member, and a second redistribution layer disposed on the other side of the first insulating layer opposing one side thereof, the first and second redistribution layers being electrically connected to the connection pad.SELECTED DRAWING: Figure 9 【課題】本発明は、ファンアウト半導体パッケージ及びその製造方法に関する。【解決手段】本発明は、貫通孔を有する第1連結部材と、上記第1連結部材の貫通孔に配置され、接続パッドが配置された活性面、及び上記活性面の反対側に配置された非活性面を有する半導体チップと、上記第1連結部材及び上記半導体チップの非活性面の少なくとも一部を封止する封止材と、上記第1連結部材及び上記半導体チップの活性面上に配置され、上記接続パッドと電気的に連結された再配線層を含む第2連結部材と、を含み、上記第1連結部材の第1絶縁層には上記第2連結部材と接した状態で第1再配線層が上記第1絶縁層に埋め込まれ、それとは反対側の側面上に第2再配線層が配置され、上記第1及び第2再配線層は上記接続パッドと電気的に連結されるファンアウト半導体パッケージ及びその製造方法に関する。【選択図】図9