PRINTED WIRING BOARD
PROBLEM TO BE SOLVED: To provide a printed wiring board with a mat pattern which has low reliability.SOLUTION: Resin insulating layers 21F and 21S are laminated on a core substrate 100. Conductor layers 22F and 22S are formed on the resin insulating layers 21F and 21S. Conductor layers 22F and 22S o...
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| creator | ADACHI TAKEMA NODA KOTA KURODA NOBUHISA USAMI YASUSHI |
| description | PROBLEM TO BE SOLVED: To provide a printed wiring board with a mat pattern which has low reliability.SOLUTION: Resin insulating layers 21F and 21S are laminated on a core substrate 100. Conductor layers 22F and 22S are formed on the resin insulating layers 21F and 21S. Conductor layers 22F and 22S of a printed wiring board 1 have mat patterns. The mat patterns are continuously formed in both an x direction and a y direction. An x-y plane is a plane parallel to a first plane F of an insulating substrate 10. The mat patterns are formed of a plurality of division patterns, and a range of an area of the division patterns is 0.4 mmto 2.5 mm.SELECTED DRAWING: Figure 2
【課題】ベタパターンを有するプリント配線板の信頼性が低い。【解決手段】コア基板１００上に樹脂絶縁層２１Ｆ、２１Ｓが積層され、その樹脂絶縁層２１Ｆ、２１Ｓの上に導体層２２Ｆ、２２Ｓが形成されている。そして、実施形態のプリント配線板１の導体層２２Ｆ、２２Ｓはベタパターンを有する。ベタパターンはｘ方向およびｙ方向共に連続して形成される。ｘ−ｙ平面は、絶縁基板１０の第１面Ｆと平行な面である。ベタパターンは複数の分割パターンで形成され、分割パターンの面積の範囲は０．４ｍｍ2〜２．５ｍｍ2である。【選択図】図２ |
| format | Patent |
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【課題】ベタパターンを有するプリント配線板の信頼性が低い。【解決手段】コア基板１００上に樹脂絶縁層２１Ｆ、２１Ｓが積層され、その樹脂絶縁層２１Ｆ、２１Ｓの上に導体層２２Ｆ、２２Ｓが形成されている。そして、実施形態のプリント配線板１の導体層２２Ｆ、２２Ｓはベタパターンを有する。ベタパターンはｘ方向およびｙ方向共に連続して形成される。ｘ−ｙ平面は、絶縁基板１０の第１面Ｆと平行な面である。ベタパターンは複数の分割パターンで形成され、分割パターンの面積の範囲は０．４ｍｍ2〜２．５ｍｍ2である。【選択図】図２</description><language>eng ; jpn</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160516&DB=EPODOC&CC=JP&NR=2016082102A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160516&DB=EPODOC&CC=JP&NR=2016082102A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ADACHI TAKEMA</creatorcontrib><creatorcontrib>NODA KOTA</creatorcontrib><creatorcontrib>KURODA NOBUHISA</creatorcontrib><creatorcontrib>USAMI YASUSHI</creatorcontrib><title>PRINTED WIRING BOARD</title><description>PROBLEM TO BE SOLVED: To provide a printed wiring board with a mat pattern which has low reliability.SOLUTION: Resin insulating layers 21F and 21S are laminated on a core substrate 100. Conductor layers 22F and 22S are formed on the resin insulating layers 21F and 21S. Conductor layers 22F and 22S of a printed wiring board 1 have mat patterns. The mat patterns are continuously formed in both an x direction and a y direction. An x-y plane is a plane parallel to a first plane F of an insulating substrate 10. The mat patterns are formed of a plurality of division patterns, and a range of an area of the division patterns is 0.4 mmto 2.5 mm.SELECTED DRAWING: Figure 2
【課題】ベタパターンを有するプリント配線板の信頼性が低い。【解決手段】コア基板１００上に樹脂絶縁層２１Ｆ、２１Ｓが積層され、その樹脂絶縁層２１Ｆ、２１Ｓの上に導体層２２Ｆ、２２Ｓが形成されている。そして、実施形態のプリント配線板１の導体層２２Ｆ、２２Ｓはベタパターンを有する。ベタパターンはｘ方向およびｙ方向共に連続して形成される。ｘ−ｙ平面は、絶縁基板１０の第１面Ｆと平行な面である。ベタパターンは複数の分割パターンで形成され、分割パターンの面積の範囲は０．４ｍｍ2〜２．５ｍｍ2である。【選択図】図２</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAJCPL0C3F1UQj3BDLcFZz8HYNceBhY0xJzilN5oTQ3g5Kba4izh25qQX58anFBYnJqXmpJvFeAkYGhmYGFkaGBkaMxUYoArwUe6Q</recordid><startdate>20160516</startdate><enddate>20160516</enddate><creator>ADACHI TAKEMA</creator><creator>NODA KOTA</creator><creator>KURODA NOBUHISA</creator><creator>USAMI YASUSHI</creator><scope>EVB</scope></search><sort><creationdate>20160516</creationdate><title>PRINTED WIRING BOARD</title><author>ADACHI TAKEMA ; NODA KOTA ; KURODA NOBUHISA ; USAMI YASUSHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2016082102A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; jpn</language><creationdate>2016</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>ADACHI TAKEMA</creatorcontrib><creatorcontrib>NODA KOTA</creatorcontrib><creatorcontrib>KURODA NOBUHISA</creatorcontrib><creatorcontrib>USAMI YASUSHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ADACHI TAKEMA</au><au>NODA KOTA</au><au>KURODA NOBUHISA</au><au>USAMI YASUSHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PRINTED WIRING BOARD</title><date>2016-05-16</date><risdate>2016</risdate><abstract>PROBLEM TO BE SOLVED: To provide a printed wiring board with a mat pattern which has low reliability.SOLUTION: Resin insulating layers 21F and 21S are laminated on a core substrate 100. Conductor layers 22F and 22S are formed on the resin insulating layers 21F and 21S. Conductor layers 22F and 22S of a printed wiring board 1 have mat patterns. The mat patterns are continuously formed in both an x direction and a y direction. An x-y plane is a plane parallel to a first plane F of an insulating substrate 10. The mat patterns are formed of a plurality of division patterns, and a range of an area of the division patterns is 0.4 mmto 2.5 mm.SELECTED DRAWING: Figure 2
【課題】ベタパターンを有するプリント配線板の信頼性が低い。【解決手段】コア基板１００上に樹脂絶縁層２１Ｆ、２１Ｓが積層され、その樹脂絶縁層２１Ｆ、２１Ｓの上に導体層２２Ｆ、２２Ｓが形成されている。そして、実施形態のプリント配線板１の導体層２２Ｆ、２２Ｓはベタパターンを有する。ベタパターンはｘ方向およびｙ方向共に連続して形成される。ｘ−ｙ平面は、絶縁基板１０の第１面Ｆと平行な面である。ベタパターンは複数の分割パターンで形成され、分割パターンの面積の範囲は０．４ｍｍ2〜２．５ｍｍ2である。【選択図】図２</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS |
| title | PRINTED WIRING BOARD |
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