SEMICONDUCTOR PACKAGE

PROBLEM TO BE SOLVED: To provide a lamination type semiconductor package which reduces heat transmitted from a lower chip to an upper chip.SOLUTION: A lamination type semiconductor package according to an embodiment includes: a first semiconductor package including a first circuit board and a first...

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Hauptverfasser: TAMAGAWA MICHIAKI, WATANABE SHINJI, KUMAGAI KINICHI, MIYAKOSHI TAKESHI, MATSUBARA HIROAKI, SAKUMOTO SHOTARO, NAKAMURA TAKU, DEMACHI HIROSHI, HOSOYAMADA SUMIKAZU, NAKAMURA SHINGO, CHIKAI TOMOYA, IWASAKI TOSHIHIRO, ISHIDO KIMINORI, HONDA HIROKAZU
Format: Patent
Sprache:eng ; jpn
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a lamination type semiconductor package which reduces heat transmitted from a lower chip to an upper chip.SOLUTION: A lamination type semiconductor package according to an embodiment includes: a first semiconductor package including a first circuit board and a first semiconductor element mounted on the first circuit board; a second semiconductor package including a second circuit board and a second semiconductor element mounted on the second circuit board, the second semiconductor package laminated on the first semiconductor package; and a heat conduction material disposed on the first semiconductor element and the first circuit board located around the first semiconductor element.SELECTED DRAWING: Figure 1 【課題】積層型半導体パッケージにおいて、下側のチップから上側のチップへの伝熱を軽減する半導体パッケージを提供することを目的とする。【解決手段】本発明の一実施形態に係る積層型半導体パッケージは、第1の回路基板と第1の回路基板に実装された第1の半導体素子を含む第1の半導体パッケージと、第2の回路基板と第2の回路基板に実装された第2の半導体素子を含み第1の半導体パッケージに積層された第2の半導体パッケージと、第1の半導体素子上及び第1の半導体素子の周辺の第1の回路基板上に配置される熱伝導材料と、を有する。【選択図】図1