SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

PROBLEM TO BE SOLVED: To inhibit unevenness of height of a brazing filler metal.SOLUTION: A semiconductor device comprises: a semiconductor die 11 including a first pad 16a and a second pad 16b; a first wiring layer 22a formed on the semiconductor die, the first wiring layer 22a including a first land 32a which is spaced from the first pad, first wiring 30a for connecting the first pad and the first land, and a first pattern 34a connected to at least one of the first land and the first wiring; a second wiring layer 22b formed on the semiconductor die, the second wiring layer 22b including a second land 32b which is spaced from the second pad, and second wiring 30b which connects the second pad and the second land and has an area larger than that of the first wiring; and a brazing filler metal layer 26 which is provided on the first wiring and the second wiring, in which thicknesses on the first land and the second land are thicker than thicknesses on the first wiring and the second wiring, respectively. 【課題】ロウ材の高さの不均一を抑制すること。【解決手段】第１パッド１６ａおよび第２パッド１６ｂを備える半導体ダイ１１と、前記半導体ダイ上に形成され、前記第１パッドから離間した第１ランド３２ａと、前記第１パッドと前記第１ランドとを接続する第１配線３０ａと、前記第１ランドと前記第１配線との少なくとも一方に接続された第１パターン３４ａと、を備えた第１配線層２２ａと、前記半導体ダイ上に形成され、前記第２パッドから離間した第２ランド３２ｂと、前記第２パッドと前記第２ランドとを接続し前記第１配線より面積が大きい第２配線３０ｂと、を備える第２配線層２２ｂと、前記第１配線上および前記第２配線層上に設けられ、前記第１ランドおよび前記第２ランド上が前記第１配線上および前記第２配線上より厚いロウ材層２６と、を具備する半導体装置。【選択図】図１