SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To provide a technology capable of stabilizing a threshold voltage.SOLUTION: A semiconductor device 1 comprises: a first trench 611 on a surface of a semiconductor substrate 10; a second trench 612 which extends, in a planar view of the surface, in a direction different from th...

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Bibliographische Detailangaben
1. Verfasser: NISHIWAKI KATSUHIKO
Format: Patent
Sprache:eng ; jpn
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a technology capable of stabilizing a threshold voltage.SOLUTION: A semiconductor device 1 comprises: a first trench 611 on a surface of a semiconductor substrate 10; a second trench 612 which extends, in a planar view of the surface, in a direction different from the direction of the first trench 611 and intersects with the first trench; a gate insulating film which covers the inner surfaces of both trenches and the inner surface of an intersection 30; a gate electrode which is formed in both trench and faces the semiconductor substrate 10 via the gate insulation film; an n-type emitter region 24 which is exposed on a surface of the semiconductor substrate 10 and is in contact with the gate insulating film in the first trench 611 but not in contact with the gate insulating film in an inner surface 301 of the intersection 30; a p-type body region which is in contact with the gate insulating film in the first trench 611 on the side deeper than the emitter region 24; and an n-type drift region which is in contact with the gate insulating film in the first trench 611 on the side deeper than the body region and is separated from the emitter region 24 by the body region. 【課題】閾値電圧を安定化できる技術を提供する。【解決手段】半導体装置1は、半導体基板10の表面において、第1トレンチ611と、該表面の平面視において第1トレンチ611と異なる方向に延び、該トレンチと交わる第2トレンチ612と、両トレンチ内面および交差部30の内面を覆うゲート絶縁膜と、両トレンチ内に形成され、ゲート絶縁膜を介し半導体基板10に対向するゲート電極を備える。また、半導体基板10表面に露出し、第1トレンチ611内のゲート絶縁膜に接し、交差部30内面301におけるゲート絶縁膜に接しないn型エミッタ領域24と、エミッタ領域24よりも深い側の第1トレンチ611内のゲート絶縁膜に接するp型ボディ領域と、ボディ領域よりも深い側の第1トレンチ611内のゲート絶縁膜に接し、ボディ領域によってエミッタ領域24から分離されるn型ドリフト領域を備える。【選択図】図1