SEMICONDUCTOR DEVICE
PROBLEM TO BE SOLVED: To inhibit the occurrence of an abnormal event such as surge current to a sense-side cell to reduce negative effect on a semiconductor device.SOLUTION: In a semiconductor device comprising a plurality of cells in a main region, a plurality of cells in a sense region and transis...
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Zusammenfassung: | PROBLEM TO BE SOLVED: To inhibit the occurrence of an abnormal event such as surge current to a sense-side cell to reduce negative effect on a semiconductor device.SOLUTION: In a semiconductor device comprising a plurality of cells in a main region, a plurality of cells in a sense region and transistors for driving the cells, when assuming that a gate resistance value in the main region and a gate resistance value in the sense region of the transistor are Rgm, Rgs, respectively, and parasitic capacitance in the main region and parasitic capacitance in the sense region of the transistor are Cgm, Cgs, respectively, a gate breaking time of the sense region is set earlier then a gate breaking time of the main region based on a formula: CR delay ratio D=(Cgs/Cgm)*(Rgs/Rgm).
【課題】センス側セルへのサージ電流の様な異常事象の発生を抑制し半導体装置への悪影響を抑制する。【解決手段】メイン領域の複数のセルと、センス領域の複数のセルと、各セルを駆動するトランジスタと、を備えた半導体装置であって、トランジスタにおけるメイン領域のゲート抵抗値とセンス領域のゲート抵抗値が、各々Rgm、Rgsであり、トランジスタにおけるメイン領域の寄生容量とセンス領域の寄生容量が、各々Cgm、Cgsであるとき、CR遅延比D=(Cgs/Cgm)*(Rgs/Rgm)に基づき、センス領域のゲート遮断時間が、メイン領域のゲート遮断時間より早く設定される。【選択図】図4 |
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