COMPOSITE ELECTRONIC COMPONENT

PROBLEM TO BE SOLVED: To suppress the bonding failure due to residual of voids by facilitating escape of bubbles generated when bonding an electronic component, having a wide surface terminal on a printed circuit board on which a wide surface mounting pad of large area is formed for mounting a large...

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Bibliographische Detailangaben
1. Verfasser: MITOME HIROYUKI
Format: Patent
Sprache:eng ; jpn
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Zusammenfassung:PROBLEM TO BE SOLVED: To suppress the bonding failure due to residual of voids by facilitating escape of bubbles generated when bonding an electronic component, having a wide surface terminal on a printed circuit board on which a wide surface mounting pad of large area is formed for mounting a large metal component, by solder reflow processing, thereby reducing the residual bubbles.SOLUTION: A large number of small area solder films divided into individual small sections are formed, by applying a cream solder to individual small section regions sectioned by a grid-like bank of solder resist provided on a wide surface mounting pad 11 formed on a printed circuit board 1. The bank of solder resist film acts as an escape route of bubbles generated in the solder film, and suppresses collection of bubbles generated in one small area solder film and bubbles generated in the other adjacent solder film thus sectioned, and reduces the size and quantity of the voids. 【課題】大型金属部品を搭載するための大面積の広面実装パッドを形成したプリント基板に広面端子を有する電子部品をはんだリフロー処理で接合する時の発生気泡の逃げを容易にして残留気泡を低減し、ボイドの残留による接合不良を抑制する。【解決手段】プリント基板1に形成された広面実装パッド11上に設けた格子状のソルダレジストの堤で区画された個々の小区画領域にクリームはんだを塗布して個々の小区画に分割された多数の小面積はんだ膜を形成する。前記ソルダレジスト膜の堤は、はんだ膜に生じた気泡の逃げ道として作用すると共に、区画された前記小面積はんだ膜の一方に発生した気泡と隣接する他方のはんだ膜に発生した気泡との集合を抑制し、ボイドの大きさと数量を低減する。【選択図】図1