GATE DRIVER
PROBLEM TO BE SOLVED: To solve a problem that causes power loss or increased heat generation at a switching element because a gate driver placed between the switching element and a PWM control unit of an inverter bridge circuit will produce an invalid or ineffective pulse if its output is applied to...
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Format: | Patent |
Sprache: | eng ; jpn |
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Zusammenfassung: | PROBLEM TO BE SOLVED: To solve a problem that causes power loss or increased heat generation at a switching element because a gate driver placed between the switching element and a PWM control unit of an inverter bridge circuit will produce an invalid or ineffective pulse if its output is applied to a gate of the switching element as it is.SOLUTION: A gate driver A is placed between a PWM control unit 40 and a switching element Q, and a signal transfer element 50 built in it relays a PWM control signal S1 from the PWM control unit 40 and transfers it to a gate of the switching element. Furthermore, a pulse passage control unit 60 provided in series with the signal transfer element 50 detects the pulse width Tp and pulse voltage Vp of the PWM control signal, permits passage of a pulse P2 of the PWM control signal only if the detected pulse width Tp is equal to or more than a pulse width specified value Tpth and the detected pulse voltage Vp is equal to or more than a pulse voltage specified value Vpth, and blocks passage of the pulse P2 otherwise.
【課題】インバータブリッジ回路におけるスイッチング素子とPWM制御部との間に介装されるゲートドライバについて、スイッチング素子のゲートにそのまま印加すれば無効あるいは非有効なパルスとなってスイッチング素子での電力損失や発熱昂進を招くという問題を解決する。【解決手段】ゲートドライバAは、PWM制御部40とスイッチング素子Qとの間に介装され、内蔵の信号伝達素子50はPWM制御部40からのPWM制御信号S1を中継してスイッチング素子のゲートに伝達する。さらに、信号伝達素子50に対して直列に設けられたパルス通過制御部60は、PWM制御信号のパルス幅Tpとパルス電圧Vpとを検出し、検出パルス幅Tpがパルス幅規定値Tpth以上でかつ検出パルス電圧Vpがパルス電圧規定値Vpth以上の場合に限りPWM制御信号のパルスP2の通過を許容し、それ以外の場合にはパルスP2の通過を遮断する。【選択図】図2 |
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