SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

PROBLEM TO BE SOLVED: To achieve a semiconductor device having a power MOSFET which supports low resistance and a high junction withstand voltage at the same time in a simple manufacturing method.SOLUTION: A semiconductor device manufacturing method comprises: forming a low-concentration p-type epit...

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1. Verfasser: KACHI TAKESHI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To achieve a semiconductor device having a power MOSFET which supports low resistance and a high junction withstand voltage at the same time in a simple manufacturing method.SOLUTION: A semiconductor device manufacturing method comprises: forming a low-concentration p-type epitaxial layer EP on an n-type substrate SUB; defining in an active part, a plurality of active regions AC by a plurality of trenches TR which extend in a first direction and have first clearances in a second direction orthogonal to the first direction; forming an n-type diffusion region NR which functions as a drain off-set layer in an epitaxial layer EP between adjacent trenches TR; forming a p-type diffusion region PR connected to a channel region (p-type diffusion region PCH) in the epitaxial layer EP between a sidewall of the trench TR and the n-type diffusion region NR to form a super junction structure; and forming an n-type diffusion region NRE having a predetermined width in the epitaxial layer EP from a sidewall to an outer periphery of the trench TR located at an end of the active part thereby to achieve improvement in drain withstand voltage.