MEMORY CONTROLLER AND SEMICONDUCTOR STORAGE DEVICE
PROBLEM TO BE SOLVED: To rearrange the order of issuing commands on the basis of a previously performed memory access request, without delaying the issue of the commands and affecting the priority of an arbiter circuit.SOLUTION: A command queue is constituted so as to store at least three or more me...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | PROBLEM TO BE SOLVED: To rearrange the order of issuing commands on the basis of a previously performed memory access request, without delaying the issue of the commands and affecting the priority of an arbiter circuit.SOLUTION: A command queue is constituted so as to store at least three or more memory access requests, and a memory control unit determines memory commands on the basis of all memory access requests stored in the command queue. A memory controller includes: an arbiter circuit that is provided on the preceding stage of the memory control unit and arbitrates a command request from a plurality of circuits according to a priority; a command history buffer that holds a plurality of command queues; and an order determination unit that performs control so as to change the order of commands to be issued on the basis of a previous command issue history, which is held in the command history buffer, and two or more newly requested commands. |
---|