INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To solve a problem in which the design efficiency of a logic circuit decreases.SOLUTION: An integrated circuit comprises: a plurality of flip-flop circuits for holding input information; a decoder circuit for reading out information held in the plurality of flip-flop circuits t...

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1. Verfasser: TAKAHASHI TSUGIO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To solve a problem in which the design efficiency of a logic circuit decreases.SOLUTION: An integrated circuit comprises: a plurality of flip-flop circuits for holding input information; a decoder circuit for reading out information held in the plurality of flip-flop circuits to output decoded signals decoded based on the read-out information; a delay occurrence circuit that detects preset changes in clock signals input to the flip-flop circuits and, after the detection of changes in the clock signals, outputs waiting end signals when a predetermined waiting time period has elapsed; and a control circuit for validating the decoded signals input from the decoder circuit in response to the waiting end signals output from the delay occurrence circuit to output the decoded signals to an output destination.