SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To provide a semiconductor device which allows a stable acceleration test of data corruption in a standby state within a prescribed time.SOLUTION: The semiconductor device comprises: SRAM cells arrayed in matrix; a word line WL provided corresponding to each row of the SRAM cel...

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Bibliographische Detailangaben
Hauptverfasser: ISHII YUICHIRO, NISHIMAKI HIDEKATSU
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a semiconductor device which allows a stable acceleration test of data corruption in a standby state within a prescribed time.SOLUTION: The semiconductor device comprises: SRAM cells arrayed in matrix; a word line WL provided corresponding to each row of the SRAM cells; and a bit line pair BB, BT provided corresponding to each column of the SRAM cells. In a low standby mode, a control circuit/decoder 50 drives the word line WL to a non-selection state and sets the bit line pair BB, BT into a floating state. In a low standby test mode in which acceleration test of data corruption in the low standby mode is performed, the control circuit/decoder 50 drives the word line WL to the non-selection state, and activates a control signal T1 and turns on NMOS transistors MN7, MN8 to thereby fix the potential of the bit line pair BB, BT at "L" level (ground voltage VSS).