SEMICONDUCTOR INTEGRATED CIRCUIT OF MASTER SLICE SYSTEM AND METHOD FOR MANUFACTURING THE SAME

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit of a master slice system capable of shortening TAT (turnaround time) and improving element utilization, and a method for manufacturing a semiconductor integrated circuit of a master slice system.SOLUTION: A semiconductor integrated...

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1. Verfasser: KOMORI YURI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit of a master slice system capable of shortening TAT (turnaround time) and improving element utilization, and a method for manufacturing a semiconductor integrated circuit of a master slice system.SOLUTION: A semiconductor integrated circuit 100 of a master slice system which is one embodiment of the present invention comprises a gate 3 of a MOS transistor formed on a semiconductor substrate 1 and a polysilicon layer 6. The polysilicon layer 6 is electrically insulated from the gate 3 of the MOS transistor formed on the semiconductor substrate, and formed so as to cover an element formed on the semiconductor substrate 1.