MOS SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To provide a MOS semiconductor device which has a low on-state voltage, and a low current rise rate at the time of turn-on; can keep a collector current rise rate low at the time of turn-on; and can reduce radiation noise.SOLUTION: A MOS semiconductor device comprises: a projec...

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1. Verfasser: TAKEI MANABU
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a MOS semiconductor device which has a low on-state voltage, and a low current rise rate at the time of turn-on; can keep a collector current rise rate low at the time of turn-on; and can reduce radiation noise.SOLUTION: A MOS semiconductor device comprises: a projected semiconductor region 50 formed on one principal surface of an n-type semiconductor substrate 1 in a stripe-shaped plane pattern, the projected semiconductor region 50 including a top flat part 50a having a p-type region 7a sandwiched between an n-type first region 4a on an upper side and an n-type second region 3 on a lower side and a recess region 5 with a depth reaching from a surface of the n-type first region 4a on the upper side to the p-type region 7a, and a slanted part 50b between the top flat part 50a and a bottom flat part 60 around the projected semiconductor region 50; and a gate electrode 9a provided on a surface of the slanted part 50b in the p-type region 7a via a gate insulation film 8. An end of the gate electrode 9a lies on a surface within the slanted part 50b, and the other end lies on a surface of the n-type second region 3 on the lower side and on the side near the p-type region 7a.