TRANSISTOR STRUCTURE OF INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To provide a method for forming an SiGe stressor, and a transistor structure of an integrated circuit.SOLUTION: A method for forming an SiGe stressor comprises the steps of: depositing a first SiGe layer on at least one of a source area and a drain area of a semiconductor subst...

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Bibliographische Detailangaben
Hauptverfasser: CHO SHIGO, CHANG CHIH-HSIANG, WANG CHIEN-HSUN, XU JUNHAO, YEH CHIHIEH
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a method for forming an SiGe stressor, and a transistor structure of an integrated circuit.SOLUTION: A method for forming an SiGe stressor comprises the steps of: depositing a first SiGe layer on at least one of a source area and a drain area of a semiconductor substrate having a channel between the source area and the drain area; and converting a top part of the first SiGe layer to an oxide layer and converting a bottom part of the first SiGe layer to a second SiGe layer, where the second SiGe layer has a higher Ge concentration than that of the first SiGe layer.