ARRANGEMENT STRUCTURE IN MAGNETORESISTIVE MEMORY DEVICE

PROBLEM TO BE SOLVED: To provide an arrangement structure in a magnetoresistive memory device.SOLUTION: A semiconductor memory device includes a column decoder, a plurality of sub-cell blocks, and a bit line selection circuit. The column decoder decodes a column address and drives a column selection...

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Hauptverfasser: REN MOTOO, KIM YOUNG-KWAN, KANG BONG-JIN, HWANG JUNG-HWA, SOHN DONG HYUN, RI ZAIEI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide an arrangement structure in a magnetoresistive memory device.SOLUTION: A semiconductor memory device includes a column decoder, a plurality of sub-cell blocks, and a bit line selection circuit. The column decoder decodes a column address and drives a column selection signal. Each sub-cell block includes a plurality of bit lines, a plurality of word lines, and a plurality of memory cells connected with the plurality of bit lines and the plurality of word lines. The bit line selection circuit includes a plurality of bit line connection control sections and selects one or more bit lines in response to the column selection signal. Each bit line connection control section connects an individual first bit line with corresponding first and second local input/output lines in response to a first and second column selection signal individually.