DITHERING DIGITALLY-CONTROLLED OSCILLATOR OUTPUT IN PHASE-LOCKED LOOP

PROBLEM TO BE SOLVED: To avoid increases in power consumption by meeting noise specifications without increasing the frequency of the PLL reference clock.SOLUTION: A digitally-controlled oscillator (DCO) 201 of a PLL 124 is dithered such that a DCO_OUT signal has a frequency that changes at dithered intervals. In one example, the DCO receives an undithered stream of incoming digital tuning words, receives a dithered reference clock signal REFD, and outputs the DCO_OUT signal such that its frequency changes occur at dithered intervals. Where the PLL is employed in the local oscillator of a cellular telephone transmitter, the novel dithering of the DCO spreads digital image noise out in frequency such that less digital image noise is present at a particular frequency offset from the main local oscillator frequency.