WIRING BOARD

PROBLEM TO BE SOLVED: To reduce influence of a stub length of a via connected to a signal wiring layer in the vicinity of an electronic system mounting surface of a wiring board without restricting a signal number used for an electronic system (LSI), and use the signal layer for high-speed transmiss...

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Bibliographische Detailangaben
Hauptverfasser:	MURAOKA SATOSHI, YAGYU MASAYOSHI
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:	PROBLEM TO BE SOLVED: To reduce influence of a stub length of a via connected to a signal wiring layer in the vicinity of an electronic system mounting surface of a wiring board without restricting a signal number used for an electronic system (LSI), and use the signal layer for high-speed transmission signals.SOLUTION: In a printed circuit board 1 having a mounted BGA package, a load capacity generated between a stub 2n part of a signal via 2c and a ground/power source wiring layer 3b is reduced by setting a clearance (gap) 7 between the signal via 2c and a ground/power supply pattern 3g arranged around the signal via 2c to a half and more size of an installation pitch Y between the signal via 2c and a ground/power supply via 3c and to a size equal to or less than a distance between the outer peripheral part of the signal via 2c and a position corresponding to an end of a pad 3f on the rear surface side of the ground/power supply via 3c.