SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

PROBLEM TO BE SOLVED: To inhibit manufacturing variation in metal wiring resistance of a semiconductor device.SOLUTION: A semiconductor device comprises a metal wiring resistance formed in a first region and a plurality of via resistance formed in a second region in the same layer with the first reg...

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1. Verfasser: KUMAMOTO KEITA
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To inhibit manufacturing variation in metal wiring resistance of a semiconductor device.SOLUTION: A semiconductor device comprises a metal wiring resistance formed in a first region and a plurality of via resistance formed in a second region in the same layer with the first region. A via chain resistance is formed by connecting the plurality of via resistances to one another alternately on an upper layer side and on a lower layer side. The metal wiring resistance and the via chain resistance are connected in series. When variation in a film thickness from a design value occurs in a manufacturing process, for example, a change direction of a resistance value of the metal wiring resistance and a change direction of a resistance value of the via chain resistance become opposite. Accordingly, a variation in a resistance value of a resistance element in a composite structure in which the metal wiring resistance and the via chain resistance are connected in series can be suppressed.