PHASE-LOCKED LOOP AND PHASE-LOCKED LOOP CONTROL METHOD

PROBLEM TO BE SOLVED: To provide a phase-locked loop and a phase-locked loop control method that implement a precise phase lock under fractional frequency division using fewer division numbers.SOLUTION: A phase comparator 3 converts a phase difference of a comparison clock from a reference clock to...

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1. Verfasser: HONGO HIRONOBU
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a phase-locked loop and a phase-locked loop control method that implement a precise phase lock under fractional frequency division using fewer division numbers.SOLUTION: A phase comparator 3 converts a phase difference of a comparison clock from a reference clock to an output current. A capacitor 4 outputs a voltage depending on the current input from the phase comparator 3. A VCO 6 controls an output frequency according to the voltage input from the capacitor 4 to output a signal having the output frequency. A variable frequency divider 7 divides the frequency of the signal output from the VCO 6 into a different value in a predetermined period to generate the comparison clock based on frequency division with a fractional value. A pulse counter 8 counts the number of comparison clocks output from the variable frequency divider 7. A compensation factor calculation section 9 acquires compensation values of current and voltage for the capacitor 4 on the basis of the count value of the pulse counter 8. A DAC 11 applies a compensating current to the capacitor 4 on the basis of the compensation values.