RESISTIVE MEMORY APPARATUS, LAYOUT STRUCTURE THEREOF, AND SENSING CIRCUIT

PROBLEM TO BE SOLVED: To provide a resistive memory apparatus capable of omitting a write circuit for a reference cell, and a layout structure thereof; to provide a resistive memory apparatus capable of writing data in a reference cell using a write circuit of a main memory cell and a layout structu...

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creator RHO KWANG MYOUNG
description PROBLEM TO BE SOLVED: To provide a resistive memory apparatus capable of omitting a write circuit for a reference cell, and a layout structure thereof; to provide a resistive memory apparatus capable of writing data in a reference cell using a write circuit of a main memory cell and a layout structure thereof; and to provide a sensing circuit for a resistive memory apparatus in which a write circuit for a reference cell is omitted.SOLUTION: A resistive memory apparatus includes a plurality of memory areas each including a main memory cell array coupled with a plurality of word lines, and a reference cell array coupled with a plurality of reference word lines. Each of the plurality of memory areas shares a bit line driver/sinker with an adjacent memory area. The layout structure thereof and the sensing circuit are provided.
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Each of the plurality of memory areas shares a bit line driver/sinker with an adjacent memory area. The layout structure thereof and the sensing circuit are provided.</description><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2013</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20130513&amp;DB=EPODOC&amp;CC=JP&amp;NR=2013089279A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20130513&amp;DB=EPODOC&amp;CC=JP&amp;NR=2013089279A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>RHO KWANG MYOUNG</creatorcontrib><title>RESISTIVE MEMORY APPARATUS, LAYOUT STRUCTURE THEREOF, AND SENSING CIRCUIT</title><description>PROBLEM TO BE SOLVED: To provide a resistive memory apparatus capable of omitting a write circuit for a reference cell, and a layout structure thereof; to provide a resistive memory apparatus capable of writing data in a reference cell using a write circuit of a main memory cell and a layout structure thereof; and to provide a sensing circuit for a resistive memory apparatus in which a write circuit for a reference cell is omitted.SOLUTION: A resistive memory apparatus includes a plurality of memory areas each including a main memory cell array coupled with a plurality of word lines, and a reference cell array coupled with a plurality of reference word lines. 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STATIC STORES
title RESISTIVE MEMORY APPARATUS, LAYOUT STRUCTURE THEREOF, AND SENSING CIRCUIT
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