RESISTIVE MEMORY APPARATUS, LAYOUT STRUCTURE THEREOF, AND SENSING CIRCUIT

PROBLEM TO BE SOLVED: To provide a resistive memory apparatus capable of omitting a write circuit for a reference cell, and a layout structure thereof; to provide a resistive memory apparatus capable of writing data in a reference cell using a write circuit of a main memory cell and a layout structure thereof; and to provide a sensing circuit for a resistive memory apparatus in which a write circuit for a reference cell is omitted.SOLUTION: A resistive memory apparatus includes a plurality of memory areas each including a main memory cell array coupled with a plurality of word lines, and a reference cell array coupled with a plurality of reference word lines. Each of the plurality of memory areas shares a bit line driver/sinker with an adjacent memory area. The layout structure thereof and the sensing circuit are provided.