SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device having a memory cell region and a peripheral circuit region, in which a plurality of buried gate transistors are formed, and which prevents contact resistance between a semiconductor layer and a contact plug of the bur...

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Bibliographische Detailangaben
1. Verfasser: TAKEYA HIROAKI
Format: Patent
Sprache:eng
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