SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device having a memory cell region and a peripheral circuit region, in which a plurality of buried gate transistors are formed, and which prevents contact resistance between a semiconductor layer and a contact plug of the bur...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device having a memory cell region and a peripheral circuit region, in which a plurality of buried gate transistors are formed, and which prevents contact resistance between a semiconductor layer and a contact plug of the buried gate transistor and increased variation among the buried gate transistors in current driving characteristics.SOLUTION: A semiconductor device manufacturing method comprises the steps of: forming on a semiconductor substrate, a first semiconductor layer, and a second semiconductor layer contacting an undersurface of the first semiconductor layer and having an impurity concentration lower than that of the first semiconductor layer; forming a gate electrode via a gate insulation film in a groove that divides an active region composed of the first semiconductor layer and the second semiconductor layer into at least two regions; forming an interlayer insulation film covering a principal surface of the semiconductor substrate; and forming a contact plug by burying a conductive film in a contact hole that penetrates the interlayer insulation film to expose a part of a top face of the first semiconductor layer. |
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