DEBUG CIRCUIT COMPARING PROCESSOR INSTRUCTION SET OPERATING MODE

PROBLEM TO BE SOLVED: To debug a code on a processor that has a plurality of instruction sets.SOLUTION: A target instruction set operating mode register 52, an address range start address register 54 and an address range end address register 56, which are included in a debug circuit 18, are loaded by programmers prior to a diagnostic/debug operation. The value written to the target instruction set operating mode register 52 is compared to a current processor instruction set operating mode, which is indicated in a current program status register 16, during execution of each instruction, to trigger a breakpoint, trace function, or other alert. The values of the start address register 54 and the end address registers 56 are respectively the beginning and the end of a target address range over which the debug circuit 18 monitors matching between the current instruction set operating mode and the target instruction set operating mode.