DYNAMIC FREQUENCY CONTROL USING COARSE CLOCK GATING

PROBLEM TO BE SOLVED: To provide a method and apparatus for controlling the frequency of a clock signal using a clock-gating circuit.SOLUTION: In one embodiment, a root clock signal and an enable signal are provided to a clock-gating circuit. The clock-gating circuit is configured to provide an oper...

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Hauptverfasser: JAMES WANG, LAW PATRICK Y
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a method and apparatus for controlling the frequency of a clock signal using a clock-gating circuit.SOLUTION: In one embodiment, a root clock signal and an enable signal are provided to a clock-gating circuit. The clock-gating circuit is configured to provide an operational clock signal (based on the root clock signal) when the enable signal is asserted. The operational clock signal is inhibited when the enable signal is de-asserted. The frequency of the operational clock signal can be output at a reduced frequency by asserting the enable signal for one of every N clock cycles. Furthermore, the frequency of the operational clock signal can be dynamically changed by changing the rate of asserting the enable signal relative to the root clock signal, without suspending operation of a functional unit receiving the operational clock signal.