SELECTION TRANSISTOR, MANUFACTURING METHOD OF SELECTION TRANSISTOR, MEMORY DEVICE AND MANUFACTURING METHOD OF MEMORY DEVICE

PROBLEM TO BE SOLVED: To provide a selection transistor which can be manufactured with a small number of steps and can suppress shift of flat band voltage, and to provide a manufacturing method of a selection transistor, a memory device and a manufacturing method of a memory device.SOLUTION: The sel...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: TANAKA YOSHIJI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a selection transistor which can be manufactured with a small number of steps and can suppress shift of flat band voltage, and to provide a manufacturing method of a selection transistor, a memory device and a manufacturing method of a memory device.SOLUTION: The selection transistor for use in a memory device including multiple memory transistors connected in series includes a tunnel insulation layer formed on a semiconductor substrate, a charge storage layer formed on the tunnel insulation layer, a blocking insulation layer formed on the charge storage layer and irradiated with a gas cluster ion beam containing argon as a source gas, a gate electrode formed on the blocking insulation layer, and a source/drain region formed in the semiconductor substrate on both sides of the gate electrode.