SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

PROBLEM TO BE SOLVED: To eliminate a need for configuring an insulation structure between a ground plane and signal wires on a substrate rear face side, and to reduce a parasitic inductance close to zero.SOLUTION: A dielectric body 2b is arranged between an outside conductor 2a and a center conducto...

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1. Verfasser: ASAMI KAZUSHI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To eliminate a need for configuring an insulation structure between a ground plane and signal wires on a substrate rear face side, and to reduce a parasitic inductance close to zero.SOLUTION: A dielectric body 2b is arranged between an outside conductor 2a and a center conductor 2c. The outside conductor 2a is directly contacted with a lower surface wiring layer 6, and the dielectric body 2b is remained at a tip of the center conductor 2c. Thereby, a noise flows via the dielectric body 2b between the center conductor 2c and the outside conductor 2a. Thus, a parasitic inductance component and a parasitic resistance component between a capacitor structure part 2 and the lower surface wiring layer 6 can be reduced close to zero to further remove the noise filtered at the capacitor structure part 2. In addition, since the center conductor 2c does not penetrate through the dielectric body 2b, a wiring layer for connecting with the center conductor 2c is not required to be formed on a rear face side of the silicon substrate 1. Therefore, since only the lower surface wiring layer 6 to be a ground plane should be formed on the rear face side of the silicon substrate 1, a complicated process such as multilayer wiring and the like can be eliminated.