SEMICONDUCTOR DEVICE MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To prevent a short circuit between elements arranged adjacent to each other across an element isolation region by embedding a microfabricated trench used for the element isolation region with an insulation film without generating voids thereby to inhibit deterioration in manufa...

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1. Verfasser: NISHITANI JUNICHIRO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To prevent a short circuit between elements arranged adjacent to each other across an element isolation region by embedding a microfabricated trench used for the element isolation region with an insulation film without generating voids thereby to inhibit deterioration in manufacturing yield.SOLUTION: A semiconductor device manufacturing method comprises: forming a first insulation film having voids inside in a trench formed in a semiconductor substrate; subsequently removing, by etching, the first insulation film so as to leave a part of the first insulation film in the trench with the voids being exposed; subsequently depositing a second insulation film in the voids and on an exposed inner wall of the trench by an ALD method; and subsequently performing one or more cycles of an HDP-CVD method including an etching step and a deposition step thereby to form an element isolation region.