SWITCHED CAPACITOR CIRCUIT, SAMPLE AND HOLD CIRCUIT, AND A/D CONVERTER

PROBLEM TO BE SOLVED: To obtain a switched capacitor circuit in which the superiority that it is adaptable even to an input signal of relatively large amplitude is maintained while limiting a required level on the operating speed of an operational amplifier applied to a switched capacitor circuit us...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: SANO MITSUHIRO
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To obtain a switched capacitor circuit in which the superiority that it is adaptable even to an input signal of relatively large amplitude is maintained while limiting a required level on the operating speed of an operational amplifier applied to a switched capacitor circuit using CLS technology.SOLUTION: A CLS circuit 120 is configured to include a capacitor Ccls and switches SW104, SW105, and SW106, while a changeover circuit 130 is configured of a conductor having an interposed switch SW 107 and SW 104, SW 105, and SW 106. Connection relation is switched by the changeover circuit 130 so that the capacitor Ccls for level shift is connected to be charged with an analog input signal Vin in the sampling phase, and interposed between an analog signal output terminal Vb and the output terminal of an operational amplifier 110 in the level shift phase.