PREPREG, METAL-CLAD LAMINATE, PRINTED WIRING BOARD, AND SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To provide a prepreg having a large retaining amount of a resin composition, a low dielectric constant, low dielectric loss tangent, and excellent moldability, further to provide a printed wiring board and a laminated board produced by using the prepreg, and further to provide...

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Bibliographische Detailangaben
1. Verfasser:	TOBISAWA AKIHIKO
Format:	Patent
Sprache:	eng
Schlagworte:	AFTER-TREATMENT NOT COVERED BY SUBCLASSES C08B, C08C, C08F,C08G CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS CHEMISTRY COMPOSITIONS BASED THEREON ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY GENERAL PROCESSES OF COMPOUNDING LAYERED PRODUCTS LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT ORNON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM MACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONSONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS METALLURGY ORGANIC MACROMOLECULAR COMPOUNDS PERFORMING OPERATIONS PRINTED CIRCUITS THEIR PREPARATION OR CHEMICAL WORKING-UP TRANSPORTING WORKING-UP
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Beschreibung
Zusammenfassung:	PROBLEM TO BE SOLVED: To provide a prepreg having a large retaining amount of a resin composition, a low dielectric constant, low dielectric loss tangent, and excellent moldability, further to provide a printed wiring board and a laminated board produced by using the prepreg, and further to provide a semiconductor device produced by using the printed wiring board.SOLUTION: Varnish is obtained when a thermosetting resin composition containing a filler at the rate of 60-85 mass% is contained in a solvent. The prepreg is obtained by removing the solvent after the varnish is retained in glass cloth. The varnish has gelling time at 150°C of 15 minutes or more and gelling time at 180°C of 3.0-7.0 minutes measured according to JIS C 6521.