METHOD OF FORMING VERTICAL NANOTUBE SEMICONDUCTOR DEVICE STRUCTURES

PROBLEM TO BE SOLVED: To provide a vertical FET structure incorporating one or a plurality of semiconductor carbon nanotubes serving as a channel region, which corresponds to a mass production technique.SOLUTION: The present invention relates to a method for fabricating vertical device structures 42...

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Bibliographische Detailangaben
Hauptverfasser: HACKNEY MARC CHARLES, STEVEN JOHN HOLMES, CHARLES WILLIAM KOBURGER III, FURUKAWA TOSHIHARU, DAVID VACLAV HORAK
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a vertical FET structure incorporating one or a plurality of semiconductor carbon nanotubes serving as a channel region, which corresponds to a mass production technique.SOLUTION: The present invention relates to a method for fabricating vertical device structures 42 incorporating at least one nanotube 14. Each nanotube 14 is grown by chemical vapor deposition catalyzed by a catalyst pad 10 and encased in a coating of a dielectric material 22. Vertical field effect transistors may be fashioned by forming a gate electrode about the encased nanotubes such that the encased nanotubes extend vertically through the thickness of the gate electrode 30. Capacitor structures 50 may be fashioned in which the encased nanotubes and the corresponding catalyst pad bearing the encased nanotubes form one capacitor plate.