GENERATION METHOD OF EVALUATION MAP, SYSTEM, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND PROGRAM

PROBLEM TO BE SOLVED: To provide a flare map generation method of which calculation amount/precision are improved.SOLUTION: A layout is divided into j pieces of regions m, to obtain the j pieces of evaluation values v corresponding to the j pieces of the regions m, for generating an evaluation map....

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Bibliographische Detailangaben
Hauptverfasser: UNO TAIGA, ARISAWA YUKIYASU
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a flare map generation method of which calculation amount/precision are improved.SOLUTION: A layout is divided into j pieces of regions m, to obtain the j pieces of evaluation values v corresponding to the j pieces of the regions m, for generating an evaluation map. For this purpose, the frequency at which the layout is divided into a plurality of regions M is decided (S1). When the layout is divided into the plurality of regions M, the region M is larger than the region m, and the center of k pieces of regions mk in the j pieces of the regions m is made to agree with that of the k pieces of regions Mk in the plurality of regions M (S3). For each of the regions M, a pattern density D of a layout in the region M is obtained (S4). The integral convolution of a point image distribution function F of the plurality of regions M and the D is calculated, to obtain an evaluation value Vk of each of the k pieces of the regions Mk (S5). Steps S2-S5 are repeated by the number of times (N) decided by the step S1, for synthesization of N pieces of the Vk obtained by the N times of the step S5 (S6).