SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To improve performance of a semiconductor device, assure reliability of the semiconductor device, reduce chip size of the semiconductor device, especially prevent occurrence of a parasitic capacitance by controlling potential of a well at the lower part of a gate electrode with...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: NITTA KYOYA, HOSHINO YUTAKA
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To improve performance of a semiconductor device, assure reliability of the semiconductor device, reduce chip size of the semiconductor device, especially prevent occurrence of a parasitic capacitance by controlling potential of a well at the lower part of a gate electrode without damaging reliability of the semiconductor device containing MOSFET formed on an SOI substrate, and prevent occurrence of failure in the MOSFET.SOLUTION: The occurrence of parasitic capacitance is prevented by controlling a potential of a well at the lower part of a gate electrode 2 using a well contact plug 8 that penetrates a hole part 27 formed on a gate electrode wiring 3. By extending an element separation region 4 along the gate electrode 2, occurrence of failure is prevented at a gate insulating film by the gettering effect.