PRINTED CIRCUIT BOARD UNIT, ELECTRONIC DEVICE, AND METHOD OF FABRICATING PRINTED CIRCUIT BOARD
PROBLEM TO BE SOLVED: To provide a fabricating method sufficiently reinforcing junction to a printed circuit board in mounting an electronic component onto the printed circuit board while ensuring a repairing property.SOLUTION: A printed circuit board unit includes the printed circuit board, and the...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | IRIGUCHI SHIGEO NAKAMURA NAOKI HATANAKA KIYOYUKI TAKETOMI NOBUO |
description | PROBLEM TO BE SOLVED: To provide a fabricating method sufficiently reinforcing junction to a printed circuit board in mounting an electronic component onto the printed circuit board while ensuring a repairing property.SOLUTION: A printed circuit board unit includes the printed circuit board, and the electronic component electrically connected to a predetermined position on the printed circuit board by solder bonding and bonded to the printed circuit board with an adhesive layer. A partial region of the adhesive layer between the printed circuit board and the electronic component is a multi-layer laminated region 34 having a first reinforcing resin layer 30 on the printed circuit board side and a second reinforcing resin layer 32 higher in bond strength than the first reinforcing resin layer 30 on the electronic component side. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2011211002A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2011211002A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2011211002A3</originalsourceid><addsrcrecordid>eNqNzLEKwjAQgOEsDlJ9h8O5QhKfIL1c7IkmJVwdLUXSSbRQ3x8XRwenf_n41-rWZY5CHpAz9izQJJc99JGlBjoTSk6RETxdGakGFz1cSNrkIQUIrsmMTjge4edoo1bT-FjK9ttK7QIJtvsyv4ayzOO9PMt7OHVWG2ON0dq6w1_oAzc5MqI</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PRINTED CIRCUIT BOARD UNIT, ELECTRONIC DEVICE, AND METHOD OF FABRICATING PRINTED CIRCUIT BOARD</title><source>esp@cenet</source><creator>IRIGUCHI SHIGEO ; NAKAMURA NAOKI ; HATANAKA KIYOYUKI ; TAKETOMI NOBUO</creator><creatorcontrib>IRIGUCHI SHIGEO ; NAKAMURA NAOKI ; HATANAKA KIYOYUKI ; TAKETOMI NOBUO</creatorcontrib><description>PROBLEM TO BE SOLVED: To provide a fabricating method sufficiently reinforcing junction to a printed circuit board in mounting an electronic component onto the printed circuit board while ensuring a repairing property.SOLUTION: A printed circuit board unit includes the printed circuit board, and the electronic component electrically connected to a predetermined position on the printed circuit board by solder bonding and bonded to the printed circuit board with an adhesive layer. A partial region of the adhesive layer between the printed circuit board and the electronic component is a multi-layer laminated region 34 having a first reinforcing resin layer 30 on the printed circuit board side and a second reinforcing resin layer 32 higher in bond strength than the first reinforcing resin layer 30 on the electronic component side.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20111020&DB=EPODOC&CC=JP&NR=2011211002A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20111020&DB=EPODOC&CC=JP&NR=2011211002A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>IRIGUCHI SHIGEO</creatorcontrib><creatorcontrib>NAKAMURA NAOKI</creatorcontrib><creatorcontrib>HATANAKA KIYOYUKI</creatorcontrib><creatorcontrib>TAKETOMI NOBUO</creatorcontrib><title>PRINTED CIRCUIT BOARD UNIT, ELECTRONIC DEVICE, AND METHOD OF FABRICATING PRINTED CIRCUIT BOARD</title><description>PROBLEM TO BE SOLVED: To provide a fabricating method sufficiently reinforcing junction to a printed circuit board in mounting an electronic component onto the printed circuit board while ensuring a repairing property.SOLUTION: A printed circuit board unit includes the printed circuit board, and the electronic component electrically connected to a predetermined position on the printed circuit board by solder bonding and bonded to the printed circuit board with an adhesive layer. A partial region of the adhesive layer between the printed circuit board and the electronic component is a multi-layer laminated region 34 having a first reinforcing resin layer 30 on the printed circuit board side and a second reinforcing resin layer 32 higher in bond strength than the first reinforcing resin layer 30 on the electronic component side.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNzLEKwjAQgOEsDlJ9h8O5QhKfIL1c7IkmJVwdLUXSSbRQ3x8XRwenf_n41-rWZY5CHpAz9izQJJc99JGlBjoTSk6RETxdGakGFz1cSNrkIQUIrsmMTjge4edoo1bT-FjK9ttK7QIJtvsyv4ayzOO9PMt7OHVWG2ON0dq6w1_oAzc5MqI</recordid><startdate>20111020</startdate><enddate>20111020</enddate><creator>IRIGUCHI SHIGEO</creator><creator>NAKAMURA NAOKI</creator><creator>HATANAKA KIYOYUKI</creator><creator>TAKETOMI NOBUO</creator><scope>EVB</scope></search><sort><creationdate>20111020</creationdate><title>PRINTED CIRCUIT BOARD UNIT, ELECTRONIC DEVICE, AND METHOD OF FABRICATING PRINTED CIRCUIT BOARD</title><author>IRIGUCHI SHIGEO ; NAKAMURA NAOKI ; HATANAKA KIYOYUKI ; TAKETOMI NOBUO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2011211002A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>IRIGUCHI SHIGEO</creatorcontrib><creatorcontrib>NAKAMURA NAOKI</creatorcontrib><creatorcontrib>HATANAKA KIYOYUKI</creatorcontrib><creatorcontrib>TAKETOMI NOBUO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>IRIGUCHI SHIGEO</au><au>NAKAMURA NAOKI</au><au>HATANAKA KIYOYUKI</au><au>TAKETOMI NOBUO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PRINTED CIRCUIT BOARD UNIT, ELECTRONIC DEVICE, AND METHOD OF FABRICATING PRINTED CIRCUIT BOARD</title><date>2011-10-20</date><risdate>2011</risdate><abstract>PROBLEM TO BE SOLVED: To provide a fabricating method sufficiently reinforcing junction to a printed circuit board in mounting an electronic component onto the printed circuit board while ensuring a repairing property.SOLUTION: A printed circuit board unit includes the printed circuit board, and the electronic component electrically connected to a predetermined position on the printed circuit board by solder bonding and bonded to the printed circuit board with an adhesive layer. A partial region of the adhesive layer between the printed circuit board and the electronic component is a multi-layer laminated region 34 having a first reinforcing resin layer 30 on the printed circuit board side and a second reinforcing resin layer 32 higher in bond strength than the first reinforcing resin layer 30 on the electronic component side.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_JP2011211002A |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS SEMICONDUCTOR DEVICES |
title | PRINTED CIRCUIT BOARD UNIT, ELECTRONIC DEVICE, AND METHOD OF FABRICATING PRINTED CIRCUIT BOARD |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-14T18%3A19%3A01IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=IRIGUCHI%20SHIGEO&rft.date=2011-10-20&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJP2011211002A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |