SEMICONDUCTOR INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To accomplish a semiconductor integrated circuit which suppresses a leak current during standby while maintaining reliability of a gate oxide film, allows an increase in a circuit area to be minimized and a defect to be surely detected. SOLUTION: A switching circuit 20 is provi...

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Bibliographische Detailangaben
Hauptverfasser: TANAKA TAKESHI, IKENO MICHIKADO, AWAKA KAORU, TAKAHASHI HIROSHI, TAKEGAMA AKIHIRO, TOYONO YUTAKA
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To accomplish a semiconductor integrated circuit which suppresses a leak current during standby while maintaining reliability of a gate oxide film, allows an increase in a circuit area to be minimized and a defect to be surely detected. SOLUTION: A switching circuit 20 is provided between a logic circuit 10 and a supply terminal of a power source voltage Vdd. In operation, a voltage of 0V is applied to a gate of a transistor MP0 in the switching circuit 20 and a bias voltage VBequal to or a little lower than the power supply voltage Vddis applied to its channel area, thereby reducing a threshold voltage of the transistor MP0 and increasing the current drive capabilities thereof. During standby, a voltage equal to the power supply voltage Vdd is applied to the gate of the transistor MP0, a voltage lower than the power supply voltage is applied to its source and a bulk bias voltage VBequal to or higher than the power supply voltage Vddis applied to the channel area, thereby minimizing a drain current of the transistor MP0. Thus, a current path of the logic circuit 10 is shut off to suppress generation of a leak current. COPYRIGHT: (C)2011,JPO&INPIT