LSI, FAILSAFE LSI FOR RAILWAY, ELECTRONIC DEVICE, AND ELECTRONIC DEVICE FOR RAILWAY

PROBLEM TO BE SOLVED: To solve such a problem that, in the technique of the conventional failsafe LSIs, the arrangement of processors and comparators in chips is mentioned, but the arrangement of package signal pins is not mentioned, and also, the correspondence to various peripheral circuits and high-speed external memories is not considered. SOLUTION: An internal interface in which outputs from two processors are collated into one is connected to a common system internal bus. A plurality of external interface circuits are connected to the common system internal bus. Furthermore, signal pins related to two systems are disposed at opposing corners of a package while signal pins related to the common system are disposed therebetween. COPYRIGHT: (C)2011,JPO&INPIT