DATA SIGNAL EVALUATION APPARATUS

PROBLEM TO BE SOLVED: To reduce costs by measuring an error rate and displaying a waveform without changing the connection of a cable. SOLUTION: A data signal evaluation apparatus has: a serial/parallel converting section 25 for converting a data signal Sx serially inputted from a signal input termi...

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Bibliographische Detailangaben
Hauptverfasser: SUZUKI SEIYA, NISHIOHARA MASANORI, MURAKAMI TAKASHI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To reduce costs by measuring an error rate and displaying a waveform without changing the connection of a cable. SOLUTION: A data signal evaluation apparatus has: a serial/parallel converting section 25 for converting a data signal Sx serially inputted from a signal input terminal 22 into an M-bit parallel data signal Sxm; an error rate measuring section 30 for measuring an error rate of the data signal Sxm; a programmable frequency divider 35 for frequency-dividing a first frequency division clock Cm synchronized to the data signal Sxm at a designated frequency dividing ratio N; a trigger signal generating section 40 for generating a trigger signal TRG for sampling start timing determination synchronized with the frequency-divided second frequency division clock Cn; a sampling signal generating section 45 for generating a sampling signal Cs from the timing in which the trigger signal TRG is received; a sampling section 50 for sampling the data signal Sx in response to the sampling signal Cs; a display 24; and a display processing section 60 for displaying an error rate measurement result E and a waveform of the data signal Sx on the display 24. These are provided in a common housing 21. COPYRIGHT: (C)2011,JPO&INPIT