MULTILAYER WIRING BOARD, AND METHOD OF MANUFACTURING THE SAME

PROBLEM TO BE SOLVED: To provide a multilayer wiring board and a method of manufacturing the same such that an amount of warpage can be suppressed, and operability and a yield are satisfactory even for coreless technique employed in which wiring layers are stacked only on one side of a copper foil....

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Bibliographische Detailangaben
Hauptverfasser: ISHIHARA MITSUYASU, KODAIRA MASAYUKI, NISHIDA TAKANORI, ISODA SATOSHI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a multilayer wiring board and a method of manufacturing the same such that an amount of warpage can be suppressed, and operability and a yield are satisfactory even for coreless technique employed in which wiring layers are stacked only on one side of a copper foil. SOLUTION: This invention relates to: the multilayer wiring board that includes a first layer wiring pattern formed by circuit-processing a metal foil A, and at least one high layer-side wiring layer having an insulating resin layer disposed on the first layer wiring pattern and a wiring pattern disposed on the insulating resin layer, wherein a high layer-side wiring pattern is formed on the insulating resin layer by circuit-processing the metal foil and a conductor layer formed by plating, and a highest layer-side wiring pattern is larger in thickness than the first layer wiring pattern or larger in conductor layer remaining ratio than the first layer wiring pattern, or a highest layer-side insulating resin layer is smaller in thickness than the insulating resin layer on the first layer wiring pattern; and the method of manufacturing the same. COPYRIGHT: (C)2011,JPO&INPIT