SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

PROBLEM TO BE SOLVED: To prevent transistor characteristics from being fluctuated in a transistor structure where a metal for controlling threshold voltage which is variable in an n-type MIS transistor and a p-type MIS transistor is added to a high dielectric constant gate insulating film. SOLUTION:...

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1. Verfasser: OSUGA TSUTOMU
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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description PROBLEM TO BE SOLVED: To prevent transistor characteristics from being fluctuated in a transistor structure where a metal for controlling threshold voltage which is variable in an n-type MIS transistor and a p-type MIS transistor is added to a high dielectric constant gate insulating film. SOLUTION: A high dielectric constant film 6 as a gate insulating film is formed extended from a first upper portion 1a onto a second active region 1b through an element isolation region 2. A first recessed portion 2a is formed on an upper portion of the element isolation region 2 of a portion adjacent to a first active region 1a. A second recessed portion 2b is formed on an upper portion of the element isolation region 2 of the portion adjacent to the second active region 1b. A second recessed portion 2b is formed shallower than the first recessed portion 2a. COPYRIGHT: (C)2011,JPO&INPIT
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2011082418A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2011082418A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2011082418A3</originalsourceid><addsrcrecordid>eNrjZLAMdvX1dPb3cwl1DvEPUnBxDfN0dlVw9HNR8HUN8fB3UfB3U_B19At1c3QOCQ3y9HNXCPFwVQh29HXlYWBNS8wpTuWF0twMSm6uIc4euqkF-fGpxQWJyal5qSXxXgFGBoaGBhZGJoYWjsZEKQIAzVYo_Q</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME</title><source>esp@cenet</source><creator>OSUGA TSUTOMU</creator><creatorcontrib>OSUGA TSUTOMU</creatorcontrib><description>PROBLEM TO BE SOLVED: To prevent transistor characteristics from being fluctuated in a transistor structure where a metal for controlling threshold voltage which is variable in an n-type MIS transistor and a p-type MIS transistor is added to a high dielectric constant gate insulating film. SOLUTION: A high dielectric constant film 6 as a gate insulating film is formed extended from a first upper portion 1a onto a second active region 1b through an element isolation region 2. A first recessed portion 2a is formed on an upper portion of the element isolation region 2 of a portion adjacent to a first active region 1a. A second recessed portion 2b is formed on an upper portion of the element isolation region 2 of the portion adjacent to the second active region 1b. A second recessed portion 2b is formed shallower than the first recessed portion 2a. COPYRIGHT: (C)2011,JPO&amp;INPIT</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20110421&amp;DB=EPODOC&amp;CC=JP&amp;NR=2011082418A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20110421&amp;DB=EPODOC&amp;CC=JP&amp;NR=2011082418A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OSUGA TSUTOMU</creatorcontrib><title>SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME</title><description>PROBLEM TO BE SOLVED: To prevent transistor characteristics from being fluctuated in a transistor structure where a metal for controlling threshold voltage which is variable in an n-type MIS transistor and a p-type MIS transistor is added to a high dielectric constant gate insulating film. SOLUTION: A high dielectric constant film 6 as a gate insulating film is formed extended from a first upper portion 1a onto a second active region 1b through an element isolation region 2. A first recessed portion 2a is formed on an upper portion of the element isolation region 2 of a portion adjacent to a first active region 1a. A second recessed portion 2b is formed on an upper portion of the element isolation region 2 of the portion adjacent to the second active region 1b. A second recessed portion 2b is formed shallower than the first recessed portion 2a. COPYRIGHT: (C)2011,JPO&amp;INPIT</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAMdvX1dPb3cwl1DvEPUnBxDfN0dlVw9HNR8HUN8fB3UfB3U_B19At1c3QOCQ3y9HNXCPFwVQh29HXlYWBNS8wpTuWF0twMSm6uIc4euqkF-fGpxQWJyal5qSXxXgFGBoaGBhZGJoYWjsZEKQIAzVYo_Q</recordid><startdate>20110421</startdate><enddate>20110421</enddate><creator>OSUGA TSUTOMU</creator><scope>EVB</scope></search><sort><creationdate>20110421</creationdate><title>SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME</title><author>OSUGA TSUTOMU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2011082418A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>OSUGA TSUTOMU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>OSUGA TSUTOMU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME</title><date>2011-04-21</date><risdate>2011</risdate><abstract>PROBLEM TO BE SOLVED: To prevent transistor characteristics from being fluctuated in a transistor structure where a metal for controlling threshold voltage which is variable in an n-type MIS transistor and a p-type MIS transistor is added to a high dielectric constant gate insulating film. SOLUTION: A high dielectric constant film 6 as a gate insulating film is formed extended from a first upper portion 1a onto a second active region 1b through an element isolation region 2. A first recessed portion 2a is formed on an upper portion of the element isolation region 2 of a portion adjacent to a first active region 1a. A second recessed portion 2b is formed on an upper portion of the element isolation region 2 of the portion adjacent to the second active region 1b. A second recessed portion 2b is formed shallower than the first recessed portion 2a. COPYRIGHT: (C)2011,JPO&amp;INPIT</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-28T06%3A13%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=OSUGA%20TSUTOMU&rft.date=2011-04-21&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJP2011082418A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true