SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To further reduce an area of an SRAM memory cell. SOLUTION: A semiconductor device includes: a first active region formed within a memory cell region on a substrate; a second active region separated from the first active region by an element isolation, the second active region...

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Bibliographische Detailangaben
Hauptverfasser: IGARASHI MOTOSHIGE, TSUBOI NOBUO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To further reduce an area of an SRAM memory cell. SOLUTION: A semiconductor device includes: a first active region formed within a memory cell region on a substrate; a second active region separated from the first active region by an element isolation, the second active region being formed at a position located nearer than a position within the first active region to a center of the memory cell region; a first gate electrode traversing the first active region; a second gate electrode separated from the first gate electrode, and traversing the first and second active regions; a first drain between the first gate electrode and the second gate electrode in the first active region; a second drain in the second active region, which is located on the side of the first drain of the second gate electrode; a first interconnection which connects between the first drain and the second drain; a third gate electrode which separates the first gate electrode and the second gate electrode, one end of the third gate electrode facing an end of the first gate electrode at the second active region side; and a second interconnection which connects between the second drain and the third gate electrode, wherein top faces of the third gate electrode and the second interconnection are formed substantially flush with each other. COPYRIGHT: (C)2011,JPO&INPIT