METHOD FOR MANUFACTURING FLOATING GATE MEMORY CELL, AND FLOATING GATE MEMORY CELL

PROBLEM TO BE SOLVED: To reduce the scattering and the diffusion of a source in the lateral direction in a channel region, and to reduce the lowering of a drain induction barrier (DIBL) in a floating ate memory cell. SOLUTION: A recess 464 is formed in a source region 422 of a substrate 404. The recess 464 is located adjacently to a stacked gate structure 408, and the recess 464 has inclined side walls 466, a bottom 468 and a depth 476. The stacked gate structure 408 is situated above a channel region 426 in the substrate 404. Furthermore, a source 488 of the floating gate memory cell 402 is formed adjacent to the inclined side walls 466 of the recess 464, and a spacer 490 is formed adjacent to the stacked gate structure 408 and the inclined side walls 466 of the recess 464. The spacer 490 extends on the bottom 468 of the recess 464 and reducing the scattering and diffusion of the source 488 in the lateral direction in the channel region 426. COPYRIGHT: (C)2011,JPO&INPIT