HIGHLY RELIABLE CONTROLLER OF MULTIPLE SYSTEM

PROBLEM TO BE SOLVED: To solve such a problem that writing/reading of different data for each of processors causes a comparison mismatch, resulting in operation stop as a case in which an ECC error history is left in a register, in a highly reliable controller of a multiple system.SOLUTION: For an a...

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Bibliographische Detailangaben
Hauptverfasser: IWASAKI SHIGEAKI, INADA MAMORU, SHIMA YASUSUKE, OMORI YASUHISA
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To solve such a problem that writing/reading of different data for each of processors causes a comparison mismatch, resulting in operation stop as a case in which an ECC error history is left in a register, in a highly reliable controller of a multiple system.SOLUTION: For an access to an A system storage device 1, in particular, an A system side read access 28, while read data (0x3) is transferred from the A system storage device 1 to an A system processor 2, the same data (0x3) as that of an A system side is distributed to a B system side through a comparator 7 and is also transferred to a B system processor 3. Within the comparator 7, the data (0x3) on the A system side is compared with the distributed same data (0x3) on the B system side, and therefore an operation can be continued as a comparison match.