PRINTED CIRCUIT BOARD DESIGN SUPPORT PROGRAM, PRINTED CIRCUIT BOARD DESIGN SUPPORT METHOD, AND PRINTED CIRCUIT BOARD DESIGN SUPPORT DEVICE

PROBLEM TO BE SOLVED: To reduce the workload in arranging a bypass capacitor corresponding to a grid array package.SOLUTION: A target terminal selecting means 1b selects a power source terminal of a grid array package component one by one as a terminal to be investigated. A connection path searching...

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Bibliographische Detailangaben
Hauptverfasser: ODA TAKAHIKO, NISHIO YOSHITAKA, KONNO EIICHI, SAKATA TOSHIYASU, KUMAGAI KAZUNORI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To reduce the workload in arranging a bypass capacitor corresponding to a grid array package.SOLUTION: A target terminal selecting means 1b selects a power source terminal of a grid array package component one by one as a terminal to be investigated. A connection path searching means 1c searches a new connection path through a first bypass capacitor between the selected target terminal and any ground terminal. A path overlapping determining means 1e determines whether there is an overlap between the new connection path and the existing connection path. When detecting the overlap of the connection paths, a path re-searching means 1f changes the position of a second bypass capacitor and re-searches a connection path through the second bypass capacitor which does not overlap the new connection path between terminals connected by the second bypass capacitor. A connection path updating means 1g updates contents of a connection path storing means 1d.