ANTI-FUSE MEMORY CELL AND SEMICONDUCTOR MEMORY

PROBLEM TO BE SOLVED: To perform a programming operation without controlling a voltage level of a counter electrode of an anti-fuse element. SOLUTION: An anti-fuse memory cell 4 includes: two N type MOS transistors M1, M2, and one anti-fuse element AF. In this case, more N type MOS transistors are u...

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1. Verfasser: NARITAKE ISAO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To perform a programming operation without controlling a voltage level of a counter electrode of an anti-fuse element. SOLUTION: An anti-fuse memory cell 4 includes: two N type MOS transistors M1, M2, and one anti-fuse element AF. In this case, more N type MOS transistors are used as compared with before, the programming operation can be performed without controlling the voltage level of the counter electrode of the anti-fuse element since only voltage levels of word line WLi and bit line BLj are controlled and the counter electrode (second electrode) of the anti-fuse element AF is grounded. Only by setting only two kinds of a first voltage VIO and a third voltage VPP as the voltage level, the programming operation can be performed without controlling the voltage level of the counter electrode of the anti-fuse element AF. COPYRIGHT: (C)2011,JPO&INPIT