MOS TRANSISTOR, SEMICONDUCTOR DEVICE HAVING BUILT-IN MOS TRANSISTOR, AND ELECTRONIC EQUIPMENT USING SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To provide a technique associated with a MOS transistor which is made low in threshold voltage and small in ON resistance, and has low power consumption and a high breakdown voltage. SOLUTION: The MOS transistor includes a buried oxide film 11 provided on a semiconductor substrate 10, a silicon layer 12 of first impurity concentration, an epitaxial layer 13 of second impurity concentration lower than the first concentration, a first conductivity-type drain region 15 of low concentration reaching the buried oxide film 11 from a surface of the epitaxial layer, a second conductivity-type channel region 14 reaching the buried oxide film, a first conductivity-type source region 16 of high concentration, a gate electrode 21 covering the channel region 14 and a portion of the drain region 15, a gate oxide film 20 between the gate electrode and epitaxial layer, a first conductivity-type drain ohmic region 15c of high concentration apart from the gate electrode in the drain region, and a second conductivity-type channel ohmic region 14d of high concentration. A channel doped region 14c of low concentration lower than the second concentration is formed right below the gate electrode. COPYRIGHT: (C)2011,JPO&INPIT